riscv: Rework Andes PLMT as a UCLASS_TIMER driver
authorSean Anderson <seanga2@gmail.com>
Mon, 28 Sep 2020 14:52:24 +0000 (10:52 -0400)
committerAndes <uboot@andestech.com>
Wed, 30 Sep 2020 00:54:45 +0000 (08:54 +0800)
commite86463f8e3a5006b43985c474ac74d0caabd0fd4
tree3d9c257c0d0245b69fae832ed66fbc2a49f35be3
parent7616e3687e447b5a838f472afb5275fe6a841f5b
riscv: Rework Andes PLMT as a UCLASS_TIMER driver

This converts the PLMT driver from the riscv-specific timer interface to be
a DM-based UCLASS_TIMER driver.

The clock-frequency/clocks properties are preferred over timebase-frequency
for two reasons. First, properties which affect a device should be located
near its binding in the device tree. Using timebase-frequency only really
makes sense when the cpu itself is the timer device. This is the case when
we read the time from a CSR, but not when there is a separate device.
Second, it lets the device use the clock subsystem which adds flexibility.
If the device is configured for a different clock speed, the timer can
adjust itself.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
arch/riscv/Kconfig
arch/riscv/include/asm/global_data.h
arch/riscv/include/asm/syscon.h
arch/riscv/lib/andes_plmt.c