arm64: dts: qcom: sa8540p-ride: enable rtc
authorEric Chanudet <echanude@redhat.com>
Wed, 9 Aug 2023 20:32:33 +0000 (16:32 -0400)
committerBjorn Andersson <andersson@kernel.org>
Thu, 10 Aug 2023 14:21:57 +0000 (07:21 -0700)
commite85cbb34f3eabc27d6e77cfde6c9afbab3d70b4b
tree87281a379c91b9cbf929888bcc6632652ed21b2b
parent605a981e53dc226f0b654b3aa74c303e5ca7c051
arm64: dts: qcom: sa8540p-ride: enable rtc

SA8540P-ride is one of the Qualcomm platforms that does not have access
to UEFI runtime services and on which the RTC registers are read-only,
as described in:
https://lore.kernel.org/all/20230202155448.6715-1-johan+linaro@kernel.org/

Reserve four bytes in one of the PMIC registers to hold the RTC offset
the same way as it was done for sc8280xp-crd which has similar
limitations:
    commit e67b45582c5e ("arm64: dts: qcom: sc8280xp-crd: enable rtc")

On SA8540P-ride, the register bank SDAM6 of the first PMIC is not
writable. Following recommendations provided during the review, use
SDAM2 from the second PMIC at offset 0xa0 instead.

Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Eric Chanudet <echanude@redhat.com>
Link: https://lore.kernel.org/r/20230809203506.1833205-1-echanude@redhat.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi
arch/arm64/boot/dts/qcom/sa8540p-ride.dts