counter: stm32-lptimer-cnt: fix the check on arr and cmp registers update
authorFabrice Gasnier <fabrice.gasnier@foss.st.com>
Wed, 23 Nov 2022 13:36:09 +0000 (14:36 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 31 Dec 2022 12:14:30 +0000 (13:14 +0100)
commite854a4ab388abefd99e9d6282dbd19218e42e6e4
tree37314e0802b99c074d90159b04ebbf52800ab953
parent39a156715fb778302612106d3c0bd1906eb5839c
counter: stm32-lptimer-cnt: fix the check on arr and cmp registers update

[ Upstream commit fd5ac974fc25feed084c2d1599d0dddb4e0556bc ]

The ARR (auto reload register) and CMP (compare) registers are
successively written. The status bits to check the update of these
registers are polled together with regmap_read_poll_timeout().
The condition to end the loop may become true, even if one of the register
isn't correctly updated.
So ensure both status bits are set before clearing them.

Fixes: d8958824cf07 ("iio: counter: Add support for STM32 LPTimer")
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20221123133609.465614-1-fabrice.gasnier@foss.st.com/
Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/counter/stm32-lptimer-cnt.c