[InstCombine] drop poison flags when simplifying 'shl' based on demanded bits
authorSanjay Patel <spatel@rotateright.com>
Fri, 14 May 2021 17:41:14 +0000 (13:41 -0400)
committerSanjay Patel <spatel@rotateright.com>
Fri, 14 May 2021 17:54:13 +0000 (13:54 -0400)
commite82db87fb102f01b0895b074e56568025c659575
tree10ec829e9ea906163d038b76d13e37047202a959
parent339d0c1d26b638c54abe98aff81e4b00b3549023
[InstCombine] drop poison flags when simplifying 'shl' based on demanded bits

As with other transforms in demanded bits, we must be careful not to
wrongly propagate nsw/nuw if we are reducing values leading up to the shift.

This bug was introduced with 1b24f35f843c and leads to the miscompile
shown in:
https://llvm.org/PR50341
llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
llvm/test/Transforms/InstCombine/shl-demand.ll