clk: tegra: Add super clock mux/divider
authorPeter De Schrijver <pdeschrijver@nvidia.com>
Tue, 28 Feb 2017 14:37:21 +0000 (16:37 +0200)
committerThierry Reding <treding@nvidia.com>
Mon, 20 Mar 2017 13:07:33 +0000 (14:07 +0100)
commite827ba1840bc6a9540deb81c6df6943a19e0e891
tree17c61ab18ac405e8cfb52930787367f285e16f73
parent6cfc8bc9ee66677fbd1b3331167d6f520e30b6fd
clk: tegra: Add super clock mux/divider

Add a super clock type which implements both mux and divider. This is
used for aclk.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/clk/tegra/clk-super.c
drivers/clk/tegra/clk.h