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(parent: 0652d4b) | patch
PCI: cadence: Write MSI data with 32bits
authorAlan Douglas <adouglas@cadence.com>
Thu, 11 Oct 2018 16:15:54 +0000 (17:15 +0100)
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Fri, 12 Oct 2018 11:09:29 +0000 (12:09 +0100)
commite81e36a96bb56f243b5ac1d114c37c086761595b
tree058ae1c4f9f2d2e7f37f5c27dde6f891edef32b7tree | snapshot
parent0652d4b6b56f73c81abbdbc7e26f772cb2dfe370commit | diff
PCI: cadence: Write MSI data with 32bits

According to the PCIe specification, although the MSI data is only
16bits, the upper 16bits should be written as 0. Use writel
instead of writew when writing the MSI data to the host.

Fixes: 37dddf14f1ae ("PCI: cadence: Add EndPoint Controller driver for Cadence PCIe controller")
Signed-off-by: Alan Douglas <adouglas@cadence.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
drivers/pci/controller/pcie-cadence-ep.c diff | blob | history
Domain: System / Kernel;