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[NFC][Codegen][X86] Tests w/ final optimized IR of SROA-with-variably-indexed-loads...
authorRoman Lebedev <lebedev.ri@gmail.com>
Fri, 23 Dec 2022 01:38:07 +0000 (04:38 +0300)
committerRoman Lebedev <lebedev.ri@gmail.com>
Fri, 23 Dec 2022 01:41:32 +0000 (04:41 +0300)
commite7f21d750cc51f5a9610b7f13586b2b6907c6097
treeb6b0d4b3ab67968f784dc21d581efa8314e61eaftree | snapshot
parenta0a51a805fdbe9d6a0f87d3746c39111d95cfb8bcommit | diff
[NFC][Codegen][X86] Tests w/ final optimized IR of SROA-with-variably-indexed-loads (D140493)

32-byte ones are for consistency only, we really only care about
up to 16-byte on 64-bit and maybe up to 8-byte on 32-bit.

In 16byte ones, we are still having some redundant vec<->scalar traffic.

https://reviews.llvm.org/D140493
llvm/test/CodeGen/X86/widen-load-of-small-alloca.ll [new file with mode: 0644] blob
Domain: System / Toolchain;