[mlir] Region/BranchOpInterface: Allow implicit type conversions along control-flow...
authorMogball <jeffniu22@gmail.com>
Fri, 4 Mar 2022 20:23:24 +0000 (20:23 +0000)
committerMogball <jeffniu22@gmail.com>
Fri, 4 Mar 2022 20:33:14 +0000 (20:33 +0000)
commite7c7b16a849fb40169a708d27cb59747139ed8c7
tree60246b832a43146393233de3f33b939cca734f2a
parente22e2774d93379d6bad41ae20194b076fdb44915
[mlir] Region/BranchOpInterface: Allow implicit type conversions along control-flow edges

RegionBranchOpInterface and BranchOpInterface are allowed to make implicit type conversions along control-flow edges. In effect, this adds an interface method, `areTypesCompatible`, to both interfaces, which should return whether the types of corresponding successor operands and block arguments are compatible. Users of the interfaces, here on forth, must be aware that types may mismatch, although current users (in MLIR core), are not affected by this change. By default, type equality is used.

`async.execute` already has unequal types along control-flow edges (`!async.value<f32>` vs. `f32`), but it opted out of calling `RegionBranchOpInterface::verifyTypes` in its verifier. That method has now been removed and `RegionBranchOpInterface` will verify types along control edges by default in its verifier.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D120790
mlir/include/mlir/Dialect/Async/IR/AsyncOps.td
mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
mlir/lib/Dialect/Async/IR/Async.cpp
mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
mlir/lib/Dialect/SCF/SCF.cpp
mlir/lib/Dialect/Shape/IR/Shape.cpp
mlir/lib/Interfaces/ControlFlowInterfaces.cpp
mlir/test/Transforms/control-flow-sink.mlir
mlir/unittests/Interfaces/ControlFlowInterfacesTest.cpp