powerpc/85xx: Rework MPC8569MDS device tree
authorKumar Gala <galak@kernel.crashing.org>
Wed, 9 Nov 2011 22:26:13 +0000 (16:26 -0600)
committerKumar Gala <galak@kernel.crashing.org>
Thu, 24 Nov 2011 08:01:36 +0000 (02:01 -0600)
commite7a7b329f2001da8fbc3a35735adf32e516b9f93
treecb25fa2b29d6d9d1edf61d6c830c365495c32267
parent1a23b4a64a6ede84eae820f35e02a869bdf09b77
powerpc/85xx: Rework MPC8569MDS device tree

Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Moved to a standard 2 #address-cells & #size-cells at top-level
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Removed CPU properties setup by u-boot to match other .dts
* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
  and moved PCI device IRQs down to virtual bridge level
* Renamed SDHC node from 'sdhci' to 'sdhc'
* Dropping "fsl,mpc8569-IP..." from compatibles for standard blocks

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi [new file with mode: 0644]
arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi [new file with mode: 0644]
arch/powerpc/boot/dts/mpc8569mds.dts