drm/msm/disp/dpu1: set mdp clk to the maximum frequency in opp table during probe
authorVinod Polimera <quic_vpolimer@quicinc.com>
Tue, 22 Mar 2022 03:27:07 +0000 (08:57 +0530)
committerDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Sun, 1 May 2022 23:39:35 +0000 (02:39 +0300)
commite791bc29fea7186e0440301ab481f1b7508decb3
tree807019aec7ad06218c5c2c0e5d84302b5005e4a6
parent92b5eff9c5823054aa17788c565169c9b12f8d10
drm/msm/disp/dpu1: set mdp clk to the maximum frequency in opp table during probe

Set mdp clock to max clock rate during probe/bind sequence from the
opp table so that rails are not at undetermined state. Since we do not
know what will be the rate set in boot loader, it would be ideal to
vote at max frequency. There could be a firmware display programmed
in bootloader and we want to transition it to kernel without underflowing.
The clock will be scaled down later when framework sends an update.

Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support")
Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/479090/
Link: https://lore.kernel.org/r/1647919631-14447-2-git-send-email-quic_vpolimer@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c