Add Hexagon packet support to ThreadPlanStepRange
authorTed Woodward <ted.woodward@codeaurora.org>
Mon, 11 May 2015 21:12:33 +0000 (21:12 +0000)
committerTed Woodward <ted.woodward@codeaurora.org>
Mon, 11 May 2015 21:12:33 +0000 (21:12 +0000)
commite76e7e9369ca1b8309d15e26b31a2bf24b311ed7
tree120d6affb5b7f5e56816122427bede3c1a61607c
parent5b202966f5e7dec49055fffd4b6eea005530b0bc
Add Hexagon packet support to ThreadPlanStepRange

Summary:
Hexagon is a VLIW processor. It can execute multiple instructions at once, called a packet. Breakpoints need to be alone in a packet. This patch will make sure that temporary breakpoints used for stepping are set at the start of a packet, which will put the breakpoint in a packet by itself.

Patch by Deepak Panickal of CodePlay and Ted Woodward of Qualcomm.

Reviewers: deepak2427, clayborg

Reviewed By: clayborg

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D9437

llvm-svn: 237047
lldb/include/lldb/Core/Disassembler.h
lldb/source/Core/Disassembler.cpp
lldb/source/Target/ThreadPlanStepRange.cpp