platform/x86: ISST: Add Intel Speed Select PUNIT MSR interface
authorSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Wed, 26 Jun 2019 22:38:49 +0000 (15:38 -0700)
committerAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Tue, 2 Jul 2019 15:41:16 +0000 (18:41 +0300)
commite765f37b9b8b4fa65682e9a78a2ca2b11d3d9096
tree40e08591bcf6445510a99f68a8a7c5a17e4cc24f
parent71b21bd7f68a6ee59003f63d2e4f84fd9b0a8d07
platform/x86: ISST: Add Intel Speed Select PUNIT MSR interface

While using new non arhitectural features using PUNIT Mailbox and MMIO
read/write interface, still there is need to operate using MSRs to
control PUNIT. User space could have used user user-space MSR interface for
this, but when user space MSR access is disabled, then it can't. Here only
limited number of MSRs are allowed using this new interface.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
drivers/platform/x86/intel_speed_select_if/isst_if_common.c
include/uapi/linux/isst_if.h