[X86][SSE] SimplifyDemandedVectorEltsForTargetNode - handle repeated shift amounts
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 19 Mar 2019 17:23:25 +0000 (17:23 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 19 Mar 2019 17:23:25 +0000 (17:23 +0000)
commite744f513c4d75c346f2daeb6dfebbd15ffa6bae7
tree558aeecbbdb43fccb122653a64b352fef8fa6108
parent2153c4b8281c1e5f25887ef9183947198c50a9d2
[X86][SSE] SimplifyDemandedVectorEltsForTargetNode - handle repeated shift amounts

If a value with multiple uses is only ever used for SSE shift amounts then we know that only the bottom 64-bits are needed.

llvm-svn: 356483
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/vector-rotate-512.ll
llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll