HLSL: pass tessellation execution modes through to SPIR-V

HLSL: pass tessellation execution modes through to SPIR-V

The SPIR-V generator had assumed tessellation modes such as
primitive type and vertex order would only appear in tess eval
(domain) shaders.  SPIR-V allows either, and HLSL allows and
possibly requires them to be in the hull shader.

This change:

1. Passes them through for either tessellation stage, and,

2. Does not set up defaults in the domain stage for HLSl compilation,
to avoid conflicting definitions.