[AArch64] Armv8.6-A Mat Mul SVE Assembly
authorLuke Geeson <luke.geeson@arm.com>
Thu, 9 Apr 2020 19:25:27 +0000 (20:25 +0100)
committerLuke Geeson <luke.geeson@arm.com>
Fri, 24 Apr 2020 14:54:06 +0000 (15:54 +0100)
commite7146838800136d6cd5c7e79ed025c530f9b7951
tree55200b313e580eb983f3bc26e5d5974569faa21b
parent7da19051253219d4bee2c50fe13f250201f1f7ec
[AArch64] Armv8.6-A Mat Mul SVE Assembly

This patch upstreams support for the Armv8.6-a Matrix Multiplication
Extension. A summary of the features can be found here:

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a

This patch includes:

- Assembly support for AArch64 Scalable Vector Instructions (in line
  with the Scalable Vector Extension - SVE)

This is part of a patch series, starting with BFloat16 support and
the other components in the armv8.6a extension (in previous patches
linked in phabricator)

Based on work by:
- Luke Geeson
- Oliver Stannard
- Luke Cheeseman

Reviewers: t.p.northover, rengolin, c-rhodes

Reviewed By: c-rhodes

Subscribers: c-rhodes, ostannard, tschuett, kristof.beyls, hiraditya,
danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77873
llvm/lib/Target/AArch64/AArch64InstrFormats.td
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/lib/Target/AArch64/SVEInstrFormats.td
llvm/test/MC/AArch64/SVE/matrix-multiply-fp-diagnostics.s [new file with mode: 0644]
llvm/test/MC/AArch64/SVE/matrix-multiply-fp32.s [new file with mode: 0644]
llvm/test/MC/AArch64/SVE/matrix-multiply-fp64.s [new file with mode: 0644]
llvm/test/MC/AArch64/SVE/matrix-multiply-int8-diagnostics.s [new file with mode: 0644]
llvm/test/MC/AArch64/SVE/matrix-multiply-int8.s [new file with mode: 0644]