[tests] Add missing REQUIRES: riscv-registered-target to clang test
author4vtomat <brandon.wu@sifive.com>
Tue, 2 May 2023 15:24:44 +0000 (08:24 -0700)
committer4vtomat <brandon.wu@sifive.com>
Tue, 2 May 2023 16:19:32 +0000 (09:19 -0700)
commite6ffd42a933e74e2b634e84ef8666483e53552f3
tree21e9b15d144270e3119e4b853b013f2feedcf9b9
parentfe558efe71c12a665d4e1b5e7638baaacfe84cf7
[tests] Add missing REQUIRES: riscv-registered-target to clang test
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/xsfvcp-x-rv64.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/xsfvcp-x.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/xsfvcp-xv.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/xsfvcp-xvv.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/xsfvcp-xvw.c