[LegalizeTypes][VP] Add widening support for binary VP ops
authorFraser Cormack <fraser@codeplay.com>
Wed, 11 Aug 2021 12:09:14 +0000 (13:09 +0100)
committerFraser Cormack <fraser@codeplay.com>
Thu, 19 Aug 2021 12:08:47 +0000 (13:08 +0100)
commite6b1ac85461ac37526fcc3157a15880c4b289b97
treec1e65b0a47c6fe2b195b2d82d17588b928d40988
parentcab7c52acdf508f73186dfe49b8cb012bb9129b2
[LegalizeTypes][VP] Add widening support for binary VP ops

This patch adds the beginnings of more thorough support in the
legalizers for vector-predicated (VP) operations.

The first step is the ability to widen illegal vectors. The more
complicated scenario in which the result/operands need widening but the
mask doesn't has not been handled here. That would require a lot of code
without an in-tree target on which to test it.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D107904
36 files changed:
llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfadd-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfdiv-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmul-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfsub-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll
llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
llvm/test/CodeGen/RISCV/rvv/vand-vp.ll
llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll
llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll
llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll
llvm/test/CodeGen/RISCV/rvv/vor-vp.ll
llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll
llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll
llvm/test/CodeGen/RISCV/rvv/vshl-vp.ll
llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll
llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll
llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll
llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll