Add float/vector registers for ppc64le
authorPavel Labath <labath@google.com>
Fri, 3 Nov 2017 15:22:36 +0000 (15:22 +0000)
committerPavel Labath <labath@google.com>
Fri, 3 Nov 2017 15:22:36 +0000 (15:22 +0000)
commite6a661053d8a9dc4b637442aa93662bf4580bc2f
tree2bf53347d1e7098ff1e314aa0a0ddf2247a09a98
parent6e6228477b337aea89b0866e995b53ee72c3c97c
Add float/vector registers for ppc64le

Summary: Add read and write functions for VSX, VMX and float registers and fix watchpoint size

Reviewers: clayborg

Reviewed By: clayborg

Subscribers: eugene, labath, clayborg, nemanjai, kbarton, JDevlieghere, anajuliapc, gut, lbianc, lldb-commits

Differential Revision: https://reviews.llvm.org/D39487
Patch by: Alexandre Yukio Yamashita <alexandre.yamashita@eldorado.org.br>

llvm-svn: 317329
lldb/packages/Python/lldbsuite/test/make/Makefile.rules
lldb/source/Core/ArchSpec.cpp
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_ppc64le.cpp
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_ppc64le.h
lldb/source/Plugins/Process/Utility/RegisterInfos_ppc64le.h
lldb/source/Plugins/Process/Utility/lldb-ppc64le-register-enums.h
lldb/source/Utility/PPC64LE_DWARF_Registers.h
lldb/source/Utility/PPC64LE_ehframe_Registers.h