ARM: 7922/1: l2x0: add Marvell Tauros3 support
authorSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Fri, 13 Dec 2013 15:42:19 +0000 (16:42 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Sun, 29 Dec 2013 12:32:47 +0000 (12:32 +0000)
commite68f31f4520ea5d1ddbcaddb320ef0b4201eef3c
treeab66c89f6347e23dea8ded7334ca2ef691c099fd
parent017f161a55b48807a73fc9dff0b69f081bf43ee3
ARM: 7922/1: l2x0: add Marvell Tauros3 support

This adds support for the Marvell Tauros3 cache controller which
is compatible with pl310 cache controller but broadcasts L1 cache
operations to L2 cache. While updating the binding documentation,
clean up the list of possible compatibles. Also reorder driver
compatibles to allow non-ARM derivated to be compatible to ARM
cache controller compatibles.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Documentation/devicetree/bindings/arm/l2cc.txt
arch/arm/include/asm/hardware/cache-l2x0.h
arch/arm/mm/cache-l2x0.c
arch/arm/mm/cache-tauros3.h [new file with mode: 0644]