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(parent: 38ab17f) | patch
MIPS/BFD: Correct register index calculation in BZ16_REG
authorMaciej W. Rozycki <macro@imgtec.com>
Sun, 24 Jan 2016 00:49:26 +0000 (00:49 +0000)
committerMaciej W. Rozycki <macro@imgtec.com>
Sun, 24 Jan 2016 01:01:14 +0000 (01:01 +0000)
commite67f83e590b8ce7a9912f665aa559cbc98c05de6
tree1977293098d8a23c3b896bb63a65ffd5dccca038tree | snapshot
parent38ab17f658f6adc1e6be70e4f3a6226af28780d5commit | diff
MIPS/BFD: Correct register index calculation in BZ16_REG

For the 3-bit register encodings of { 0, 1, 2, 3, 4, 5, 6, 7 } return
the 5-bit encodings of { 16, 17, 2, 3, 4, 5, 6, 7 } respectively rather
than { 24, 25, 2, 3, 4, 5, 6, 7 }.

bfd/
* elfxx-mips.c (BZ16_REG): Correct calculation.
bfd/ChangeLog diff | blob | history
bfd/elfxx-mips.c diff | blob | history
Domain: System / Toolchain;