projects / platform / upstream / llvm.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 8c25bb3) | patch
[RISCV] Define vmsbf.m/vmsif.m/vmsof.m/viota.m/vid.v intrinsics.
authorZakk Chen <zakk.chen@sifive.com>
Fri, 25 Dec 2020 02:13:56 +0000 (18:13 -0800)
committerZakk Chen <zakk.chen@sifive.com>
Mon, 28 Dec 2020 13:54:18 +0000 (05:54 -0800)
commite673d40199477f48b78ed9ad790ce7356474f907
tree6eb0692a94d2f235f942b32cb54292ef433d6343tree | snapshot
parent8c25bb3d0d5e956a3dc3a8d26b2e7ab509d0b72ccommit | diff
[RISCV] Define vmsbf.m/vmsif.m/vmsof.m/viota.m/vid.v intrinsics.

Define those intrinsics and lower to V instructions.

Use update_llc_test_checks.py for viota.m tests to check
earlyclobber is applied correctly.
mask viota.m tests uses the same argument as input and mask for
avoid dependency of D93364.

We work with @rogfer01 from BSC to come out this patch.

Reviewed By: HsiangKai

Differential Revision: https://reviews.llvm.org/D93823
12 files changed:
llvm/include/llvm/IR/IntrinsicsRISCV.td diff | blob | history
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td diff | blob | history
llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll [new file with mode: 0644] blob
Domain: System / Toolchain;