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(parent: c2a050c) | patch
drm/amd/display: PSRSU+DSC WA for specific TCON
authorDavid Zhang <dingchen.zhang@amd.com>
Tue, 3 May 2022 22:19:39 +0000 (18:19 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 6 Jun 2022 18:42:27 +0000 (14:42 -0400)
commite61a048eabf9d1245f86e67ec4787d2f10e5a1e0
tree8c6bd4dfa5953c04d677e25bf71f2fcf76bf8690tree | snapshot
parentc2a050c5e07faf9ed2fa1daa1eb642d9da4a879dcommit | diff
drm/amd/display: PSRSU+DSC WA for specific TCON

[why]
Some specific TCON chip has HW limitation to support PSRSU+DSC.

[how]
Force ffu mode when DSC enabled if we detect it is the specific
model from sink OUI DPCD. And disable ABM update for this case.

Signed-off-by: David Zhang <dingchen.zhang@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dc_link.h diff | blob | history
drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c diff | blob | history
Domain: System / Kernel;