MIPS: ralink: fix cpu clock of mt7621 and add dt clk devices
authorChuanhong Guo <gch981213@gmail.com>
Thu, 21 Mar 2019 14:42:51 +0000 (22:42 +0800)
committerPaul Burton <paul.burton@mips.com>
Thu, 4 Apr 2019 18:23:36 +0000 (11:23 -0700)
commite6046b5e69a070f8a1af868bba788cf796bcd9a8
treee607eb8af6807fd1fb9a4f8630588f26deef1cce
parente6331a321aafcc291a60ceedf4d6b0051a6117ca
MIPS: ralink: fix cpu clock of mt7621 and add dt clk devices

For a long time the mt7621 uses a fixed cpu clock which causes a problem
if the cpu frequency is not 880MHz.

This patch fixes the cpu clock calculation and adds the cpu/bus clkdev
which will be used in dts.

Ported from OpenWrt:
c7ca224299 ramips: fix cpu clock of mt7621 and add dt clk devices

Signed-off-by: Weijie Gao <hackpascal@gmail.com>
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: John Crispin <john@phrozen.org>
Cc: linux-kernel@vger.kernel.org
arch/mips/include/asm/mach-ralink/mt7621.h
arch/mips/ralink/mt7621.c
arch/mips/ralink/timer-gic.c