[AArch64][SVE] Ensure PTEST operands have type nxv16i1
authorRosie Sumpter <rosie.sumpter@arm.com>
Thu, 30 Jun 2022 11:15:00 +0000 (12:15 +0100)
committerRosie Sumpter <rosie.sumpter@arm.com>
Tue, 12 Jul 2022 08:27:59 +0000 (09:27 +0100)
commite5edc1b5eecfb8abc4e6d4d385da7ed0b456579c
treeec8af83e46f3552dce6da917ad6ab043a37743da
parent767b26a4e2e54bcf1df1163e0e55c278e3acef7e
[AArch64][SVE] Ensure PTEST operands have type nxv16i1

Currently any legal predicate types will be pattern-matched when
creating a PTEST instruction. This could be a problem in future since
PTEST always uses the .B specifier for the operand, but it is not
always guaranteed that the extra lanes of unpacked types (e.g. nxv4i1)
are zero. This patch ensures the operands of PTEST are type nxv16i1,
where the undef lanes are set to zero.

Differential Revision: https://reviews.llvm.org/D129282/
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.h
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/lib/Target/AArch64/SVEInstrFormats.td
llvm/test/CodeGen/AArch64/sve-setcc.ll