[BINUTILS, AArch64, 1/2] Add new LDGM/STGM instruction
authorSudakshina Das <sudi.das@arm.com>
Thu, 11 Apr 2019 09:13:23 +0000 (10:13 +0100)
committerSudakshina Das <sudi.das@arm.com>
Thu, 11 Apr 2019 09:13:23 +0000 (10:13 +0100)
commite54010f1aeb050cb9d65862a0afe9095a7a85f27
tree9d730c0e01304541dbbd95b4113a60b56c8138c2
parent68811f8ff84895ef1cad37ac6947f1a340dd2ae2
[BINUTILS, AArch64, 1/2] Add new LDGM/STGM instruction

This patch adds the new LDGM/STGM instructions of the
Armv8.5-A Memory Tagging Extension. This is part of the changes
that have been introduced recently in the 00bet10 release

The instructions are as follows:
LDGM Xt, [<Xn|SP>]
STGM Xt, [<Xn|SP>]

*** gas/ChangeLog ***

2019-04-11  Sudakshina Das  <sudi.das@arm.com>

* testsuite/gas/aarch64/armv8_5-a-memtag.d: New tests for ldgm and stgm.
* testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise.
* testsuite/gas/aarch64/illegal-memtag.l: Likewise.
* testsuite/gas/aarch64/illegal-memtag.s: Likewise.

*** opcodes/ChangeLog ***

2019-04-11  Sudakshina Das  <sudi.das@arm.com>

* aarch64-asm-2.c: Regenerated.
* aarch64-dis-2.c: Likewise.
* aarch64-opc-2.c: Likewise.
* aarch64-tbl.h (aarch64_opcode): Add new ldgm and stgm.
gas/ChangeLog
gas/testsuite/gas/aarch64/armv8_5-a-memtag.d
gas/testsuite/gas/aarch64/armv8_5-a-memtag.s
gas/testsuite/gas/aarch64/illegal-memtag.l
gas/testsuite/gas/aarch64/illegal-memtag.s
opcodes/ChangeLog
opcodes/aarch64-asm-2.c
opcodes/aarch64-dis-2.c
opcodes/aarch64-opc-2.c
opcodes/aarch64-tbl.h