ARM: dts: exynos: correct PMIC interrupt trigger level on Midas family
authorKrzysztof Kozlowski <krzk@kernel.org>
Thu, 10 Dec 2020 21:25:21 +0000 (22:25 +0100)
committerKrzysztof Kozlowski <krzk@kernel.org>
Sun, 7 Mar 2021 19:56:17 +0000 (20:56 +0100)
commite52dcd6e70fab51f53292e53336ecb007bb60889
tree597d3a92ea0edce8a770ab2cc660a2cdd4521fc0
parent15107e443ab8c6cb35eff10438993e4bc944d9ae
ARM: dts: exynos: correct PMIC interrupt trigger level on Midas family

The Maxim PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.

Additionally, the interrupt line is shared so using level sensitive
interrupt is here especially important to avoid races.

Fixes: 15dfdfad2d4a ("ARM: dts: Add basic dts for Exynos4412-based Trats 2 board")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201210212534.216197-5-krzk@kernel.org
arch/arm/boot/dts/exynos4412-midas.dtsi