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(parent: 3eef33a) | patch
[X86][AVX] Enabled MULHS/MULHU v16i16 vectors on AVX1 targets
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Sat, 26 Mar 2016 15:44:55 +0000 (15:44 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Sat, 26 Mar 2016 15:44:55 +0000 (15:44 +0000)
commite4dbeb40c6a08abb5486c25ab0b31926f10d6248
treefbba0aa7238ad81f16210166c046e34ab763383dtree | snapshot
parent3eef33a80656ffe30f5815708c400b17e8f3bae8commit | diff
[X86][AVX] Enabled MULHS/MULHU v16i16 vectors on AVX1 targets

Correct splitting of v16i16 vectors into v8i16 vectors to prevent scalarization

Differential Revision: http://reviews.llvm.org/D18307

llvm-svn: 264512
llvm/lib/Target/X86/X86ISelLowering.cpp diff | blob | history
llvm/test/CodeGen/X86/vector-idiv-sdiv-256.ll diff | blob | history
llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll diff | blob | history
Domain: System / Toolchain;