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(parent: f225272) | patch
[X86] Create extra prolog/epilog for stack realignment
authorLuo, Yuanke <yuanke.luo@intel.com>
Wed, 22 Mar 2023 12:41:36 +0000 (20:41 +0800)
committerLuo, Yuanke <yuanke.luo@intel.com>
Wed, 22 Mar 2023 14:20:27 +0000 (22:20 +0800)
commite4ceb5a7bb9b8f6d730530345649286370dd3ff8
treee34111c88749fc05759bb1434ceb677693631b7etree | snapshot
parentf2252726c40a77d83982932cfc647f459a4c5c69commit | diff
[X86] Create extra prolog/epilog for stack realignment

Fix some bugs and reland e4c1dfed38370b4 and 614c63bec6d67c.
1. Run argument stack rebase pass before the reserved physical register
   is finalized.
2. Add LEA pseudo instruction to prevent the instruction being
   eliminated.
3. Don't support X32.
16 files changed:
llvm/lib/Target/X86/CMakeLists.txt diff | blob | history
llvm/lib/Target/X86/X86.h diff | blob | history
llvm/lib/Target/X86/X86ArgumentStackSlotRebase.cpp [new file with mode: 0644] blob
llvm/lib/Target/X86/X86FrameLowering.cpp diff | blob | history
llvm/lib/Target/X86/X86InstrArithmetic.td diff | blob | history
llvm/lib/Target/X86/X86MachineFunctionInfo.h diff | blob | history
llvm/lib/Target/X86/X86RegisterInfo.cpp diff | blob | history
llvm/lib/Target/X86/X86RegisterInfo.h diff | blob | history
llvm/lib/Target/X86/X86RegisterInfo.td diff | blob | history
llvm/lib/Target/X86/X86TargetMachine.cpp diff | blob | history
llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir diff | blob | history
llvm/test/CodeGen/X86/O0-pipeline.ll diff | blob | history
llvm/test/CodeGen/X86/i386-baseptr.ll diff | blob | history
llvm/test/CodeGen/X86/opt-pipeline.ll diff | blob | history
llvm/test/CodeGen/X86/statepoint-invoke-ra-enter-at-end.mir diff | blob | history
llvm/test/CodeGen/X86/x86-64-baseptr.ll diff | blob | history
Domain: System / Toolchain;