RISC-V: Fix RVV related testsuite
authorKito Cheng <kito.cheng@sifive.com>
Sun, 6 Nov 2022 00:01:02 +0000 (17:01 -0700)
committerKito Cheng <kito.cheng@sifive.com>
Mon, 19 Dec 2022 07:57:48 +0000 (15:57 +0800)
commite4337398620098f96a7680ce748c9da178514acf
treedb6b32cf4ea982969225f264e6abe51c355e3fb3
parente2e154fe5bac0f62cc8bfe59165c742885490a79
RISC-V: Fix RVV related testsuite

Use wrapper of riscv_vector.h for RVV related testcases,
more detail see https://gcc.gnu.org/pipermail/gcc-patches/2022-October/603140.html

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/mov-1.c: Use double quotes to
include riscv_vector.h rather than angle brackets.
* gcc.target/riscv/rvv/base/mov-10.c: Ditto.
* gcc.target/riscv/rvv/base/mov-11.c: Ditto.
* gcc.target/riscv/rvv/base/mov-12.c: Ditto.
* gcc.target/riscv/rvv/base/mov-13.c: Ditto.
* gcc.target/riscv/rvv/base/mov-2.c: Ditto.
* gcc.target/riscv/rvv/base/mov-3.c: Ditto.
* gcc.target/riscv/rvv/base/mov-4.c: Ditto.
* gcc.target/riscv/rvv/base/mov-5.c: Ditto.
* gcc.target/riscv/rvv/base/mov-6.c: Ditto.
* gcc.target/riscv/rvv/base/mov-7.c: Ditto.
* gcc.target/riscv/rvv/base/mov-8.c: Ditto.
* gcc.target/riscv/rvv/base/mov-9.c: Ditto.
* gcc.target/riscv/rvv/base/vread_csr.c: Ditto.
* gcc.target/riscv/rvv/base/vsetvl-1.c: Ditto.
* gcc.target/riscv/rvv/base/vwrite_csr.c: Ditto.
16 files changed:
gcc/testsuite/gcc.target/riscv/rvv/base/mov-1.c
gcc/testsuite/gcc.target/riscv/rvv/base/mov-10.c
gcc/testsuite/gcc.target/riscv/rvv/base/mov-11.c
gcc/testsuite/gcc.target/riscv/rvv/base/mov-12.c
gcc/testsuite/gcc.target/riscv/rvv/base/mov-13.c
gcc/testsuite/gcc.target/riscv/rvv/base/mov-2.c
gcc/testsuite/gcc.target/riscv/rvv/base/mov-3.c
gcc/testsuite/gcc.target/riscv/rvv/base/mov-4.c
gcc/testsuite/gcc.target/riscv/rvv/base/mov-5.c
gcc/testsuite/gcc.target/riscv/rvv/base/mov-6.c
gcc/testsuite/gcc.target/riscv/rvv/base/mov-7.c
gcc/testsuite/gcc.target/riscv/rvv/base/mov-8.c
gcc/testsuite/gcc.target/riscv/rvv/base/mov-9.c
gcc/testsuite/gcc.target/riscv/rvv/base/vread_csr.c
gcc/testsuite/gcc.target/riscv/rvv/base/vsetvl-1.c
gcc/testsuite/gcc.target/riscv/rvv/base/vwrite_csr.c