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[RISCV] Verify consistency of a couple TSFlags related to vector operands
authorPhilip Reames <preames@rivosinc.com>
Thu, 22 Sep 2022 15:27:23 +0000 (08:27 -0700)
committerPhilip Reames <listmail@philipreames.com>
Thu, 22 Sep 2022 15:35:17 +0000 (08:35 -0700)
commite41765aa4dc034ca582d2d1df7944c1c1b3a9ba7
tree1b96af33802d1a1a7aa8b1e918565b3519485f96tree | snapshot
parentbf7c7696fe8fcef468d921d3174eccc186a3cd04commit | diff
[RISCV] Verify consistency of a couple TSFlags related to vector operands

Various bits of existing code assume the presence of one operand implies the presence of another.  Add verifier rules to catch violations.

Differential Revision: https://reviews.llvm.org/D133810
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp diff | blob | history
Domain: System / Toolchain;