Merge tag 'riscv-dt-for-v6.6-final' of https://git.kernel.org/pub/scm/linux/kernel...
authorArnd Bergmann <arnd@arndb.de>
Mon, 16 Oct 2023 21:14:09 +0000 (23:14 +0200)
committerArnd Bergmann <arnd@arndb.de>
Mon, 16 Oct 2023 21:14:10 +0000 (23:14 +0200)
commite4078ebbddf69f5a82f164dc07d50321b7f641cf
treefc8c0d24dd990f3462e6b659d5eb9c081468ab70
parent5e24617f6686e28e8db246db366abd1eb7953c92
parentcf98fe6b579e55aa71b6197e34c112b51f0c2a66
Merge tag 'riscv-dt-for-v6.6-final' of https://git./linux/kernel/git/conor/linux into arm/fixes

RISC-V Devicetrees for v6.6-final

A single fix for the Starfive VisionFive 2 platform so that chip select
for SPI matches the vendor documentation.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-dt-for-v6.6-final' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  riscv: dts: starfive: visionfive 2: correct spi's ss pin

Link: https://lore.kernel.org/r/20231015-outmatch-tragedy-228f91d396b5@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>