riscv: dts: microchip: mpfs: remove pci axi address translation property
authorConor Dooley <conor.dooley@microchip.com>
Fri, 19 Aug 2022 23:14:16 +0000 (00:14 +0100)
committerConor Dooley <conor.dooley@microchip.com>
Tue, 23 Aug 2022 21:15:55 +0000 (22:15 +0100)
commite4009c5fa77b4356aa37ce002e9f9952dfd7a615
tree796f269f780625814c7937b9f7a94e96d5f5d216
parent2b55915d27dcaa35f54bad7925af0a76001079bc
riscv: dts: microchip: mpfs: remove pci axi address translation property

An AXI master address translation table property was inadvertently
added to the device tree & this was not caught by dtbs_check at the
time. Remove the property - it should not be in mpfs.dtsi anyway as
it would be more suitable in -fabric.dtsi nor does it actually apply
to the version of the reference design we are using for upstream.

Link: https://www.microsemi.com/document-portal/doc_download/1245812-polarfire-fpga-and-polarfire-soc-fpga-pci-express-user-guide
Fixes: 528a5b1f2556 ("riscv: dts: microchip: add new peripherals to icicle kit device tree")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
arch/riscv/boot/dts/microchip/mpfs.dtsi