arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function
authorKishon Vijay Abraham I <kishon@ti.com>
Wed, 30 Sep 2020 12:20:31 +0000 (15:20 +0300)
committerNishanth Menon <nm@ti.com>
Wed, 30 Sep 2020 12:34:03 +0000 (07:34 -0500)
commite38a45b0192c4562e610c9c81e4c742b48fa69f0
tree7dd30e2b7ee79f3c0cd306a1e71530582337df62
parent6197d7139d128d3391a94bfad467ffe349a869a6
arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function

First two lanes of SERDES is connected to PCIe, third lane is
connected to QSGMII and the last lane is connected to USB. However,
Cadence torrent SERDES doesn't support more than 2 protocols
at the same time. Configure it only for PCIe and QSGMII.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20200930122032.23481-6-rogerq@ti.com
arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts