arc/nps400: New peephole2 pattern allow more cmem loads
authorAndrew Burgess <andrew.burgess@embecosm.com>
Thu, 17 Nov 2016 22:40:05 +0000 (22:40 +0000)
committerAndrew Burgess <aburgess@gcc.gnu.org>
Thu, 17 Nov 2016 22:40:05 +0000 (22:40 +0000)
commite389ba3073f8cfaa6209c27418ad175234c15482
treed1d24a4ac6cce3b81d65f6d75b22d2f66801f2fc
parent9775c1a5ea9df3e82db338719bf0a15d9b8713cb
arc/nps400: New peephole2 pattern allow more cmem loads

In the case where we access a single bit from a value and use this in a
EQ/NE comparison, GCC will convert this into a sign-extend and GE/LT
comparison.

Normally this would be fine, however, if the value is in CMEM memory,
then we don't have a sign-extending load available (using the special
short CMEM load instructions), and instead we end up using a long form
load with LIMM, which is less efficient.

This peephole optimisation looks for the sign-extend followed by GE/LT
pattern and converts this back into a load and EQ/NE comparison.

gcc/ChangeLog:

* config/arc/arc.md (cmem bit/sign-extend peephole2): New peephole
to make better use of cmem loads in the case where a single bit is
being accessed.
* config/arc/predicates.md (ge_lt_comparison_operator): New
predicate.

gcc/testsuite/ChangeLog:

* gcc.target/arc/cmem-bit-1.c: New file.
* gcc.target/arc/cmem-bit-2.c: New file.
* gcc.target/arc/cmem-bit-3.c: New file.
* gcc.target/arc/cmem-bit-4.c: New file.

From-SVN: r242572
gcc/ChangeLog
gcc/config/arc/arc.md
gcc/config/arc/predicates.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/arc/cmem-bit-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/arc/cmem-bit-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/arc/cmem-bit-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/arc/cmem-bit-4.c [new file with mode: 0644]