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(parent: fa55b7d) | patch
clk: tegra: Make vde a child of pll_p on tegra114
authorDmitry Osipenko <digetx@gmail.com>
Sun, 14 Nov 2021 22:07:58 +0000 (01:07 +0300)
committerThierry Reding <treding@nvidia.com>
Wed, 15 Dec 2021 15:39:15 +0000 (16:39 +0100)
commite360e116a0eec9cf719cda5860e95d36606687e7
tree4563cdc69ec9744791843f0eb2ebf3593c3e127etree | snapshot
parentfa55b7dcdc43c1aa1ba12bca9d2dd4318c2a0dbfcommit | diff
clk: tegra: Make vde a child of pll_p on tegra114

The current default is to leave the VDE clock's parent at the default,
which is clk_m. However, that is not a configuration that will allow the
VDE to function. Reparent it to pll_p instead to make sure the hardware
can actually decode video content.

Tested-by: Anton Bambura <jenneron@protonmail.com> # ASUS TF701T
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/clk/tegra/clk-tegra114.c diff | blob | history
Domain: System / Kernel;