drm/amd/amdgpu: Fix SQ_DEBUG_STS_GLOBAL* registers
authorTom St Denis <tom.stdenis@amd.com>
Mon, 15 Jun 2020 16:17:46 +0000 (12:17 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 1 Jul 2020 05:59:21 +0000 (01:59 -0400)
commite3569fab49886123c81f18d675fb1719d73cf27d
tree73d4fcd21bf0f92ab22966d2575c051cabe124d6
parentd31bdabbf5b6f5a667aefa2c381f7b534cad4f12
drm/amd/amdgpu:  Fix SQ_DEBUG_STS_GLOBAL* registers

Forgot to subtract the SOC15 IP offsetand add the BASE_IDX values.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h