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(parent: 1cc21f7) | patch
tools/power turbostat: update PERF_LIMIT_REASONS decoding
authorLen Brown <len.brown@intel.com>
Fri, 13 Mar 2015 20:30:57 +0000 (16:30 -0400)
committerLen Brown <len.brown@intel.com>
Mon, 13 Apr 2015 19:52:54 +0000 (15:52 -0400)
commite33cbe852de48c313a8a52686765c58a711dd9e4
tree0fca1f6a3507278776b1a02838205067d2fdb52btree | snapshot
parent1cc21f7b6b747220c29b42cfd1c84b5648d12407commit | diff
tools/power turbostat: update PERF_LIMIT_REASONS decoding

cosmetic only.

order the decoding of MSR_PERF_LIMIT_REASONS bits
from MSB to LSB -- which you notice when more than 1 bit is set
and you are, say, comparing the output to the documentation...

Signed-off-by: Len Brown <len.brown@intel.com>
tools/power/x86/turbostat/turbostat.c diff | blob | history
Domain: System / Kernel;