clk: baikal-t1: Add SATA internal ref clock buffer
authorSerge Semin <Sergey.Semin@baikalelectronics.ru>
Thu, 29 Sep 2022 22:53:58 +0000 (01:53 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 26 Oct 2022 10:35:20 +0000 (12:35 +0200)
commite338131e980b2f9861b09bfcc29dcd972584b483
tree3ad95acfc43188f75d9bf2375da9f6ce9eefd764
parent35b766027580bf0f378fed99209ff51560a6c825
clk: baikal-t1: Add SATA internal ref clock buffer

[ Upstream commit 081a9b7c74eae4e12b2cb1b86720f836a8f29247 ]

It turns out the internal SATA reference clock signal will stay
unavailable for the SATA interface consumer until the buffer on it's way
is ungated. So aside with having the actual clock divider enabled we need
to ungate a buffer placed on the signal way to the SATA controller (most
likely some rudiment from the initial SoC release). Seeing the switch flag
is placed in the same register as the SATA-ref clock divider at a
non-standard ffset, let's implement it as a separate clock controller with
the set-rate propagation to the parental clock divider wrapper. As such
we'll be able to disable/enable and still change the original clock source
rate.

Fixes: 353afa3a8d2e ("clk: Add Baikal-T1 CCU Dividers driver")
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Link: https://lore.kernel.org/r/20220929225402.9696-5-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/clk/baikal-t1/ccu-div.c
drivers/clk/baikal-t1/ccu-div.h
drivers/clk/baikal-t1/clk-ccu-div.c