Fix a bug where the EmulateInstructionARM64 handling of STP/LDP instructions

Fix a bug where the EmulateInstructionARM64 handling of STP/LDP instructions
for floating point registers was not recording them correctly.  I needed to
change the EmulateInstructionARM64 unwind plans from using the DWARF
register numbering scheme to using the LLDB register numbering scheme
(because dwarf doesn't define register numbers for the 64-bit "d" registers).
Updated the EmulateInstructionARM64 unit tests to work with the LLDB
register numbering scheme and added a unit test to check the floating
point register spills & restores are correctly recorded.

https://reviews.llvm.org/D25864
<rdar://problem/28745483>

llvm-svn: 285662