[AArch64][SVE] Asm: Support for SVE condition code aliases
authorSander de Smalen <sander.desmalen@arm.com>
Wed, 4 Jul 2018 08:50:49 +0000 (08:50 +0000)
committerSander de Smalen <sander.desmalen@arm.com>
Wed, 4 Jul 2018 08:50:49 +0000 (08:50 +0000)
commite31e6d46dd634f25352987caae5a2bfea1f73975
treeada4c436b165d3cc69900aec362a562d4e5972bb
parenta2d582563dcbefdca27c3fa23541438fb1830504
[AArch64][SVE] Asm: Support for SVE condition code aliases

SVE overloads the AArch64 PSTATE condition flags and introduces
a set of condition code aliases for the assembler. The
details are described in section 2.2 of the architecture
reference manual supplement for SVE.

In short:

  SVE alias =>  AArch64 name
  --------------------------
  NONE      => EQ
  ANY       => NE
  NLAST     => HS
  LAST      => LO
  FIRST     => MI
  NFRST     => PL
  PMORE     => HI
  PLAST     => LS
  TCONT     => GE
  TSTOP     => LT

Reviewers: rengolin, fhahn, SjoerdMeijer, samparker, javed.absar

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D48869

llvm-svn: 336245
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/test/MC/AArch64/SVE/condtion-codes.s [new file with mode: 0644]