drm/amd/display: Add missing DCN30 registers and fields for OTG_CRC_CNTL2
authorNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Thu, 9 Jul 2020 20:21:37 +0000 (16:21 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 14 Jul 2020 18:38:17 +0000 (14:38 -0400)
commite2f60fd8ba6199e6d1f3191239613834d5fcf5ad
tree8263becfe463c3ca90fea1f55415aa23d75a2022
parent4462282a7253e3663790f8ab092a4107d905bd76
drm/amd/display: Add missing DCN30 registers and fields for OTG_CRC_CNTL2

[Why]
When enabling the debugfs for CRC capture we hit assertions caused by
register address and field masks and shifts missing.

[How]
We want these registers programmed, so add in the SRI/SF entries for
this register.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.h