[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for...
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 8 Aug 2019 10:37:03 +0000 (10:37 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 8 Aug 2019 10:37:03 +0000 (10:37 +0000)
commite2e366797ed51599c57e64417e616ccbd39c9901
tree047755ab75e0dd1b664497b74dc385761bcd6cc3
parent987331671f02d66dec825e662f07deb507d90a36
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::EXTRACT_VECTOR_ELT

This patch attempts to peek through vectors based on the demanded bits/elt of a particular ISD::EXTRACT_VECTOR_ELT node, allowing us to avoid dependencies on ops that have no impact on the extract.

In particular this helps remove some unnecessary scalar->vector->scalar patterns.

The wasm shift patterns are annoying - @tlively has indicated that the wasm vector shift codegen are to be refactored in the near-term and isn't considered a major issue.

Differential Revision: https://reviews.llvm.org/D65887

llvm-svn: 368276
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/test/CodeGen/AArch64/vecreduce-and-legalization.ll
llvm/test/CodeGen/ARM/dagcombine-anyexttozeroext.ll
llvm/test/CodeGen/WebAssembly/simd-arith.ll
llvm/test/CodeGen/WebAssembly/simd-extended-extract.ll
llvm/test/CodeGen/X86/promote-vec3.ll
llvm/test/CodeGen/X86/vec_smulo.ll
llvm/test/CodeGen/X86/vec_umulo.ll
llvm/test/CodeGen/X86/vector-reduce-mul.ll
llvm/test/CodeGen/X86/xor.ll