dt-bindings: timer: Add bindings for the RISC-V timer device
authorAnup Patel <apatel@ventanamicro.com>
Tue, 3 Jan 2023 14:11:01 +0000 (19:41 +0530)
committerDaniel Lezcano <daniel.lezcano@linaro.org>
Mon, 13 Feb 2023 12:10:16 +0000 (13:10 +0100)
commite2bcf2d876fd7ca6ecca09794ac58d7e3a544794
treeb7a1c2d85117fe6269ed33506a1caa365de3693a
parent8b3b8fbb4896984b5564789a42240e4b3caddb61
dt-bindings: timer: Add bindings for the RISC-V timer device

We add DT bindings for a separate RISC-V timer DT node which can
be used to describe implementation specific behaviour (such as
timer interrupt not triggered during non-retentive suspend).

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Link: https://lore.kernel.org/r/20230103141102.772228-3-apatel@ventanamicro.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@kernel.org>
Documentation/devicetree/bindings/timer/riscv,timer.yaml [new file with mode: 0644]