Reland "Correct dwarf unwind information in function epilogue for X86"
authorPetar Jovanovic <petar.jovanovic@mips.com>
Tue, 7 Nov 2017 14:40:27 +0000 (14:40 +0000)
committerPetar Jovanovic <petar.jovanovic@mips.com>
Tue, 7 Nov 2017 14:40:27 +0000 (14:40 +0000)
commite2a585dddc9402f96350f61991bdc76aa0600aca
tree4c9d8d91e07148c9e2dd04511638465ac6c2f460
parentd5b7a00fd53398211a048e534ad43b32d474cf7c
Reland "Correct dwarf unwind information in function epilogue for X86"

Reland r317100 with minor fix regarding ComputeCommonTailLength function in
BranchFolding.cpp. Skipping top CFI instructions block needs to executed on
several more return points in ComputeCommonTailLength().

Original r317100 message:

"Correct dwarf unwind information in function epilogue for X86"

This patch aims to provide correct dwarf unwind information in function
epilogue for X86.

It consists of two parts. The first part inserts CFI instructions that set
appropriate cfa offset and cfa register in emitEpilogue() in
X86FrameLowering. This part is X86 specific.

The second part is platform independent and ensures that:

- CFI instructions do not affect code generation
- Unwind information remains correct when a function is modified by
  different passes. This is done in a late pass by analyzing information
  about cfa offset and cfa register in BBs and inserting additional CFI
  directives where necessary.

Changed CFI instructions so that they:

- are duplicable
- are not counted as instructions when tail duplicating or tail merging
- can be compared as equal

Added CFIInstrInserter pass:

- analyzes each basic block to determine cfa offset and register valid at
  its entry and exit
- verifies that outgoing cfa offset and register of predecessor blocks match
  incoming values of their successors
- inserts additional CFI directives at basic block beginning to correct the
  rule for calculating CFA

Having CFI instructions in function epilogue can cause incorrect CFA
calculation rule for some basic blocks. This can happen if, due to basic
block reordering, or the existence of multiple epilogue blocks, some of the
blocks have wrong cfa offset and register values set by the epilogue block
above them.

CFIInstrInserter is currently run only on X86, but can be used by any target
that implements support for adding CFI instructions in epilogue.

Patch by Violeta Vukobrat.

llvm-svn: 317579
101 files changed:
llvm/include/llvm/CodeGen/Passes.h
llvm/include/llvm/CodeGen/TargetFrameLowering.h
llvm/include/llvm/InitializePasses.h
llvm/include/llvm/Target/Target.td
llvm/lib/CodeGen/BranchFolding.cpp
llvm/lib/CodeGen/CFIInstrInserter.cpp [new file with mode: 0644]
llvm/lib/CodeGen/CMakeLists.txt
llvm/lib/CodeGen/CodeGen.cpp
llvm/lib/CodeGen/MachineInstr.cpp
llvm/lib/CodeGen/TailDuplicator.cpp
llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
llvm/lib/Target/X86/X86FrameLowering.cpp
llvm/lib/Target/X86/X86FrameLowering.h
llvm/lib/Target/X86/X86TargetMachine.cpp
llvm/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll
llvm/test/CodeGen/X86/2011-10-19-widen_vselect.ll
llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll
llvm/test/CodeGen/X86/GlobalISel/brcond.ll
llvm/test/CodeGen/X86/GlobalISel/callingconv.ll
llvm/test/CodeGen/X86/GlobalISel/frameIndex.ll
llvm/test/CodeGen/X86/O0-pipeline.ll
llvm/test/CodeGen/X86/TruncAssertZext.ll
llvm/test/CodeGen/X86/avx512-mask-op.ll
llvm/test/CodeGen/X86/avx512-regcall-Mask.ll
llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
llvm/test/CodeGen/X86/avx512-schedule.ll
llvm/test/CodeGen/X86/avx512-select.ll
llvm/test/CodeGen/X86/avx512-vbroadcast.ll
llvm/test/CodeGen/X86/avx512bw-intrinsics-fast-isel.ll
llvm/test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll
llvm/test/CodeGen/X86/avx512bw-intrinsics.ll
llvm/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll
llvm/test/CodeGen/X86/avx512vl-vbroadcast.ll
llvm/test/CodeGen/X86/avx512vl-vec-masked-cmp.ll
llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll
llvm/test/CodeGen/X86/bitcast-and-setcc-512.ll
llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll
llvm/test/CodeGen/X86/bitcast-setcc-256.ll
llvm/test/CodeGen/X86/bitcast-setcc-512.ll
llvm/test/CodeGen/X86/bool-vector.ll
llvm/test/CodeGen/X86/cmp.ll
llvm/test/CodeGen/X86/emutls-pie.ll
llvm/test/CodeGen/X86/emutls.ll
llvm/test/CodeGen/X86/epilogue-cfi-fp.ll [new file with mode: 0644]
llvm/test/CodeGen/X86/epilogue-cfi-no-fp.ll [new file with mode: 0644]
llvm/test/CodeGen/X86/fast-isel-int-float-conversion.ll
llvm/test/CodeGen/X86/fast-isel-store.ll
llvm/test/CodeGen/X86/frame-lowering-debug-intrinsic-2.ll
llvm/test/CodeGen/X86/frame-lowering-debug-intrinsic.ll
llvm/test/CodeGen/X86/haddsub-2.ll
llvm/test/CodeGen/X86/hipe-cc64.ll
llvm/test/CodeGen/X86/illegal-bitfield-loadstore.ll
llvm/test/CodeGen/X86/imul.ll
llvm/test/CodeGen/X86/lea-opt-cse1.ll
llvm/test/CodeGen/X86/lea-opt-cse2.ll
llvm/test/CodeGen/X86/lea-opt-cse3.ll
llvm/test/CodeGen/X86/lea-opt-cse4.ll
llvm/test/CodeGen/X86/legalize-shift-64.ll
llvm/test/CodeGen/X86/live-out-reg-info.ll
llvm/test/CodeGen/X86/load-combine.ll
llvm/test/CodeGen/X86/masked_gather_scatter.ll
llvm/test/CodeGen/X86/memset-nonzero.ll
llvm/test/CodeGen/X86/merge-consecutive-loads-128.ll
llvm/test/CodeGen/X86/movtopush.ll
llvm/test/CodeGen/X86/mul-constant-result.ll
llvm/test/CodeGen/X86/mul-i256.ll
llvm/test/CodeGen/X86/mul128.ll
llvm/test/CodeGen/X86/pr21792.ll
llvm/test/CodeGen/X86/pr29061.ll
llvm/test/CodeGen/X86/pr29112.ll
llvm/test/CodeGen/X86/pr30430.ll
llvm/test/CodeGen/X86/pr32241.ll
llvm/test/CodeGen/X86/pr32256.ll
llvm/test/CodeGen/X86/pr32282.ll
llvm/test/CodeGen/X86/pr32284.ll
llvm/test/CodeGen/X86/pr32329.ll
llvm/test/CodeGen/X86/pr32345.ll
llvm/test/CodeGen/X86/pr32451.ll
llvm/test/CodeGen/X86/pr34088.ll
llvm/test/CodeGen/X86/pr34653.ll
llvm/test/CodeGen/X86/pr9743.ll
llvm/test/CodeGen/X86/push-cfi-debug.ll
llvm/test/CodeGen/X86/push-cfi-obj.ll
llvm/test/CodeGen/X86/push-cfi.ll
llvm/test/CodeGen/X86/return-ext.ll
llvm/test/CodeGen/X86/rtm.ll
llvm/test/CodeGen/X86/select-mmx.ll
llvm/test/CodeGen/X86/setcc-lowering.ll
llvm/test/CodeGen/X86/shrink_vmul.ll
llvm/test/CodeGen/X86/statepoint-call-lowering.ll
llvm/test/CodeGen/X86/statepoint-gctransition-call-lowering.ll
llvm/test/CodeGen/X86/statepoint-invoke.ll
llvm/test/CodeGen/X86/throws-cfi-fp.ll [new file with mode: 0644]
llvm/test/CodeGen/X86/throws-cfi-no-fp.ll [new file with mode: 0644]
llvm/test/CodeGen/X86/vector-sext.ll
llvm/test/CodeGen/X86/vector-shuffle-avx512.ll
llvm/test/CodeGen/X86/vector-shuffle-v1.ll
llvm/test/CodeGen/X86/wide-integer-cmp.ll
llvm/test/CodeGen/X86/x86-framelowering-trap.ll
llvm/test/CodeGen/X86/x86-interleaved-access.ll
llvm/test/CodeGen/X86/x86-no_caller_saved_registers-preserve.ll