clk: renesas: mstp: Support 8-bit registers for r7s72100
authorChris Brandt <chris.brandt@renesas.com>
Thu, 15 Dec 2016 17:00:27 +0000 (12:00 -0500)
committerStephen Boyd <sboyd@codeaurora.org>
Thu, 22 Dec 2016 00:33:14 +0000 (16:33 -0800)
commite2a33c34ddff22ee208d80abdd12b88a98d6cb60
tree60f1a5bbbcda32a59d06d548c749b4f3f9f7e5f4
parent2aab7a2055a1705c9e30920d95a596226999eb21
clk: renesas: mstp: Support 8-bit registers for r7s72100

The RZ/A1 is different than the other Renesas SOCs because the MSTP
registers are 8-bit instead of 32-bit and if you try writing values as
32-bit nothing happens...meaning this driver never worked for r7s72100.

Fixes: b6face404f38 ("ARM: shmobile: r7s72100: add essential clock nodes to dtsi")
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/renesas/clk-mstp.c