Fix sub-register number of an address register encoding
authorHomer Hsing <homer.xing@intel.com>
Thu, 18 Oct 2012 04:37:31 +0000 (12:37 +0800)
committerDamien Lespiau <damien.lespiau@intel.com>
Mon, 4 Mar 2013 15:54:34 +0000 (15:54 +0000)
commite221b0aa78ccd0f75f64dc3fab66c06fa9fb1828
tree69f6042328d833437be3a5e011a9f04b8b572d63
parent599d7d244afa4cf70de02d7b6799449fe8cbe57b
Fix sub-register number of an address register encoding

The AddrSubRegNum field in the instruction binary code should be:
  code    value(advanced_flag==0)   value(advanced_flag==1)
  a0.0             0                         0
  a0.1        invalid input                  1
  a0.2             1                         2
  a0.3        invalid input                  3
  a0.4             2                         4
  a0.5        invalid input                  5
  a0.6             3                         6
  a0.7        invalid input                  7
  a0.8             4                  invalid input
  a0.10            5                  invalid input
  a0.12            6                  invalid input
  a0.14            7                  invalid input
assembler/src/gram.y