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(parent: e19d525) | patch
[RISCV] Simplify vector instruction handling in RISCVMCInstLower.cpp.
authorCraig Topper <craig.topper@sifive.com>
Thu, 10 Dec 2020 21:37:42 +0000 (13:37 -0800)
committerCraig Topper <craig.topper@sifive.com>
Thu, 10 Dec 2020 21:40:00 +0000 (13:40 -0800)
commite2006ed0f73e3d7c1545c506f26c330bcc59f60e
tree70b50ae1ec58e3c91f0a9ba17b97dde715e25e02tree | snapshot
parente19d5258461ce7838e4be6973ba519d250c000f1commit | diff
[RISCV] Simplify vector instruction handling in RISCVMCInstLower.cpp.

Use RegisterClass::contains instead of going through getMinimalPhysRegClass
and hasSuperClassEq.

Remove the special case for NoRegister. It's identical to the
handling for any other regsiter that isn't VRM2/M4/M8.
llvm/lib/Target/RISCV/RISCVMCInstLower.cpp diff | blob | history
Domain: System / Toolchain;