dm: spi: Correct status register access width
authorSimon Glass <sjg@chromium.org>
Sat, 4 Jul 2015 00:28:21 +0000 (18:28 -0600)
committerSimon Glass <sjg@chromium.org>
Wed, 15 Jul 2015 00:03:19 +0000 (18:03 -0600)
commite1e332c8f2e5cac70566998a0ba0ccfdea437f10
tree0c3abcb9110ea2a766a6cc455464397834e406d9
parenta452002259e172c93277dbe5752817e0732afe78
dm: spi: Correct status register access width

The status register on ICH9 is a single byte, so use byte access when
writing to it, to avoid updating the control register also.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
drivers/spi/ich.c