[Hexagon] New HVX target features.
authorSumanth Gundapaneni <sgundapa@codeaurora.org>
Wed, 18 Oct 2017 18:07:07 +0000 (18:07 +0000)
committerSumanth Gundapaneni <sgundapa@codeaurora.org>
Wed, 18 Oct 2017 18:07:07 +0000 (18:07 +0000)
commite1983bcf552980433a7a8ed7a2ae31ded4ae9b4a
treea971d5be4ebd3445c32d5c802eac212ce2843964
parent265d253aae7b6d44618e07db7ee042b4b1aeb9c6
[Hexagon] New HVX target features.

This patch lets the llvm tools handle the new HVX target features that
are added by frontend (clang). The target-features are of the form
"hvx-length64b" for 64 Byte HVX mode, "hvx-length128b" for 128 Byte mode HVX.
"hvx-double" is an alias to "hvx-length128b" and is soon will be deprecated.
The hvx version target feature is upgated form "+hvx" to "+hvxv{version_number}.
Eg: "+hvxv62"

For the correct HVX code generation, the user must use the following
target features.
For 64B mode: "+hvxv62" "+hvx-length64b"
For 128B mode: "+hvxv62" "+hvx-length128b"

Clang picks a default length if none is specified. If for some reason,
no hvx-length is specified to llvm, the compilation will bail out.
There is a corresponding clang patch.

Differential Revision: https://reviews.llvm.org/D38851

llvm-svn: 316101
110 files changed:
llvm/lib/Target/Hexagon/Hexagon.td
llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
llvm/lib/Target/Hexagon/HexagonPseudo.td
llvm/lib/Target/Hexagon/HexagonRegisterInfo.td
llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
llvm/lib/Target/Hexagon/HexagonSubtarget.h
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
llvm/test/CodeGen/Hexagon/SUnit-boundary-prob.ll
llvm/test/CodeGen/Hexagon/bit-bitsplit-at.ll
llvm/test/CodeGen/Hexagon/bit-bitsplit-src.ll
llvm/test/CodeGen/Hexagon/bit-bitsplit.ll
llvm/test/CodeGen/Hexagon/bit-ext-sat.ll
llvm/test/CodeGen/Hexagon/bit-extract-off.ll
llvm/test/CodeGen/Hexagon/bit-extract.ll
llvm/test/CodeGen/Hexagon/bit-has.ll
llvm/test/CodeGen/Hexagon/bit-loop-rc-mismatch.ll
llvm/test/CodeGen/Hexagon/bit-rie.ll
llvm/test/CodeGen/Hexagon/bitconvert-vector.ll
llvm/test/CodeGen/Hexagon/build-vector-shuffle.ll
llvm/test/CodeGen/Hexagon/builtin-expect.ll
llvm/test/CodeGen/Hexagon/cfgopt-fall-through.ll
llvm/test/CodeGen/Hexagon/cfi-offset.ll
llvm/test/CodeGen/Hexagon/common-gep-inbounds.ll
llvm/test/CodeGen/Hexagon/const-pool-tf.ll
llvm/test/CodeGen/Hexagon/convert-to-dot-old.ll
llvm/test/CodeGen/Hexagon/convert_const_i1_to_i8.ll
llvm/test/CodeGen/Hexagon/dead-store-stack.ll
llvm/test/CodeGen/Hexagon/early-if-merge-loop.ll
llvm/test/CodeGen/Hexagon/early-if-vecpi.ll
llvm/test/CodeGen/Hexagon/early-if-vecpred.ll
llvm/test/CodeGen/Hexagon/eliminate-pred-spill.ll
llvm/test/CodeGen/Hexagon/expand-condsets-dead-bad.ll
llvm/test/CodeGen/Hexagon/expand-condsets-dead-pred.ll
llvm/test/CodeGen/Hexagon/expand-vselect-kill.ll
llvm/test/CodeGen/Hexagon/expand-vstorerw-undef.ll
llvm/test/CodeGen/Hexagon/expand-vstorerw-undef2.ll
llvm/test/CodeGen/Hexagon/find-loop-instr.ll
llvm/test/CodeGen/Hexagon/fminmax.ll
llvm/test/CodeGen/Hexagon/frame-offset-overflow.ll
llvm/test/CodeGen/Hexagon/hasfp-crash1.ll
llvm/test/CodeGen/Hexagon/hasfp-crash2.ll
llvm/test/CodeGen/Hexagon/hexagon_vector_loop_carried_reuse.ll
llvm/test/CodeGen/Hexagon/hexagon_vector_loop_carried_reuse_constant.ll
llvm/test/CodeGen/Hexagon/hvx-nontemporal.ll
llvm/test/CodeGen/Hexagon/hwloop-noreturn-call.ll
llvm/test/CodeGen/Hexagon/hwloop-preh.ll
llvm/test/CodeGen/Hexagon/inline-asm-qv.ll
llvm/test/CodeGen/Hexagon/inline-asm-vecpred128.ll
llvm/test/CodeGen/Hexagon/intrinsics/byte-store-double.ll
llvm/test/CodeGen/Hexagon/intrinsics/byte-store.ll
llvm/test/CodeGen/Hexagon/intrinsics/system_user.ll
llvm/test/CodeGen/Hexagon/jt-in-text.ll
llvm/test/CodeGen/Hexagon/loop-idiom/pmpy-infinite-loop.ll
llvm/test/CodeGen/Hexagon/loop-idiom/pmpy-mod.ll
llvm/test/CodeGen/Hexagon/loop-prefetch.ll
llvm/test/CodeGen/Hexagon/lower-extract-subvector.ll
llvm/test/CodeGen/Hexagon/memops-stack.ll
llvm/test/CodeGen/Hexagon/misaligned_double_vector_store_not_fast.ll
llvm/test/CodeGen/Hexagon/multi-cycle.ll
llvm/test/CodeGen/Hexagon/newify-crash.ll
llvm/test/CodeGen/Hexagon/newvaluejump3.ll
llvm/test/CodeGen/Hexagon/peephole-kill-flags.ll
llvm/test/CodeGen/Hexagon/plt-rel.ll
llvm/test/CodeGen/Hexagon/post-inc-aa-metadata.ll
llvm/test/CodeGen/Hexagon/propagate-vcombine.ll
llvm/test/CodeGen/Hexagon/rdf-def-mask.ll
llvm/test/CodeGen/Hexagon/rdf-inline-asm-fixed.ll
llvm/test/CodeGen/Hexagon/rdf-inline-asm.ll
llvm/test/CodeGen/Hexagon/reg-scavengebug-3.ll
llvm/test/CodeGen/Hexagon/reg-scavenger-valid-slot.ll
llvm/test/CodeGen/Hexagon/regalloc-bad-undef.mir
llvm/test/CodeGen/Hexagon/regalloc-block-overlap.ll
llvm/test/CodeGen/Hexagon/select-instr-align.ll
llvm/test/CodeGen/Hexagon/stack-align-reset.ll
llvm/test/CodeGen/Hexagon/store-shift.ll
llvm/test/CodeGen/Hexagon/switch-lut-explicit-section.ll
llvm/test/CodeGen/Hexagon/switch-lut-function-section.ll
llvm/test/CodeGen/Hexagon/switch-lut-multiple-functions.ll
llvm/test/CodeGen/Hexagon/switch-lut-text-section.ll
llvm/test/CodeGen/Hexagon/undo-dag-shift.ll
llvm/test/CodeGen/Hexagon/v60-cur.ll
llvm/test/CodeGen/Hexagon/v60-vsel1.ll
llvm/test/CodeGen/Hexagon/v60Intrins.ll
llvm/test/CodeGen/Hexagon/v60Vasr.ll
llvm/test/CodeGen/Hexagon/v60small.ll
llvm/test/CodeGen/Hexagon/v6vec-vprint.ll
llvm/test/CodeGen/Hexagon/vassign-to-combine.ll
llvm/test/CodeGen/Hexagon/vdmpy-halide-test.ll
llvm/test/CodeGen/Hexagon/vec-pred-spill1.ll
llvm/test/CodeGen/Hexagon/vec-vararg-align.ll
llvm/test/CodeGen/Hexagon/vector-align.ll
llvm/test/CodeGen/Hexagon/vload-postinc-sel.ll
llvm/test/CodeGen/Hexagon/vmpa-halide-test.ll
llvm/test/CodeGen/Hexagon/vpack_eo.ll
llvm/test/CodeGen/Hexagon/vselect-pseudo.ll
llvm/test/MC/Hexagon/align.s
llvm/test/MC/Hexagon/double-vector-producer.s
llvm/test/MC/Hexagon/test.s
llvm/test/MC/Hexagon/v60-alu.s
llvm/test/MC/Hexagon/v60-misc.s
llvm/test/MC/Hexagon/v60-permute.s
llvm/test/MC/Hexagon/v60-shift.s
llvm/test/MC/Hexagon/v60-vcmp.s
llvm/test/MC/Hexagon/v60-vmem.s
llvm/test/MC/Hexagon/v60-vmpy-acc.s
llvm/test/MC/Hexagon/v60-vmpy1.s
llvm/test/MC/Hexagon/v60lookup.s
llvm/test/MC/Hexagon/v62_all.s
llvm/test/Transforms/SimplifyCFG/Hexagon/switch-to-lookup-table.ll
llvm/test/tools/llvm-objdump/Hexagon/source-interleave-hexagon.ll