[mips][mt][6/7] Add support for mftr, mttr instructions.
authorSimon Dardis <simon.dardis@imgtec.com>
Wed, 12 Jul 2017 19:47:45 +0000 (19:47 +0000)
committerSimon Dardis <simon.dardis@imgtec.com>
Wed, 12 Jul 2017 19:47:45 +0000 (19:47 +0000)
commite171a913d62bdc8a5434d0d1915fabb6e907fc6a
tree0d1498f5cf6c87177016f092268dcd50ce4f429a
parent0962cb2e3a9955f990b8f8a42d34f812ed222697
[mips][mt][6/7] Add support for mftr, mttr instructions.

Unlike many other instructions, these instructions have aliases which
take coprocessor registers, gpr register, accumulator (and dsp accumulator)
registers, floating point registers, floating point control registers and
coprocessor 2 data and control operands.

For the moment, these aliases are treated as pseudo instructions which are
expanded into the underlying instruction. As a result, disassembling these
instructions shows the underlying instruction and not the alias.

Reviewers: slthakur, atanasyan

Differential Revision: https://reviews.llvm.org/D35253

llvm-svn: 307836
15 files changed:
llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
llvm/lib/Target/Mips/MipsMTInstrFormats.td
llvm/lib/Target/Mips/MipsMTInstrInfo.td
llvm/lib/Target/Mips/MipsSchedule.td
llvm/lib/Target/Mips/MipsTargetStreamer.h
llvm/test/MC/Disassembler/Mips/mt/valid-r2-el.txt
llvm/test/MC/Disassembler/Mips/mt/valid-r2.txt
llvm/test/MC/Mips/mt/invalid-wrong-error.s [new file with mode: 0644]
llvm/test/MC/Mips/mt/invalid.s
llvm/test/MC/Mips/mt/mftr-mttr-aliases-invalid-wrong-error.s [new file with mode: 0644]
llvm/test/MC/Mips/mt/mftr-mttr-aliases-invalid.s [new file with mode: 0644]
llvm/test/MC/Mips/mt/mftr-mttr-aliases.s [new file with mode: 0644]
llvm/test/MC/Mips/mt/mftr-mttr-reserved-valid.s [new file with mode: 0644]
llvm/test/MC/Mips/mt/valid.s